[ltp] T60p idle GPU temperature?
Henrique de Moraes Holschuh
Thu, 12 Jul 2012 13:52:45 -0300
On Thu, 12 Jul 2012, Alex Deucher wrote:
> On Thu, Jul 12, 2012 at 12:38 PM, Henrique de Moraes Holschuh
> <firstname.lastname@example.org> wrote:
> > On Thu, 12 Jul 2012, Alex Deucher wrote:
> >> > No. Either it never switched the number of lanes, or it somehow avoided
> >> > whatever causes the Intel 915PM in my T43 to SERR. If the code is exactly
> >> > equal, and it DID change the PCIe link width just like modern KMS does, then
> >> > the usermode->kernel mode transition was somehow helpful.
> >> Might be the size of the step. IIRC, the UMS code switched between 16
> >> and 4 lanes, while the KMS code switches between 16 and however many
> >> lanes are specified in the power low mode (usually 1).
> > Ok, that's easy to test. I will mangle the drm driver in 3.0 to a
> > minimum of 4 lanes and test it.
> > I notice the relevant code (in 3.0.36) says "FIXME: wait for idle".
> > Can't that be it?
> That comment should be removed. The radeon PM core code already takes
> the engine locks and makes sure the GPU is idle before changing the
> power state.
Ok. The trivial patch (map all lanes from 1 to 4 to 4 in
rv370_set_pcie_lanes) just hung the box. I will have to look more at the
code, I probably have to fix it in the pm array itself.
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot