[ltp] Maximum Battery Capacity of an T60 under Linux

[Laurent Gilson]

Hello,

>> Look at /proc/acpi/processor/CPU/power. Does the bus master activity  
>> drop
>> to 000...000 if you do nothing ? Do the cores reach C4 or deeper ?
>
> Hum, I can only see C1 and C2 there. Am I missing something in the
> kernek, or is it a hardware limitation? (It's not a thinkpad, but a Mac
> Mini)

Mac Mini ? The one with intel Core-Something or a Power-based one ?

The CoreDuo, PentiumM,... most modern Intel and AMD chips can do 8  
C-States plus C0 (C0-C8). C8 is the best powersaving mode, C0 is running  
and executing stuff.

Build into a PC motherboard and connected to stuff like AGP/PCIe  
Gfx-cards, WLAN, USB, ... anything using DMA C5-C8 become nearly  
unreachable. The deeper the sleep, the more functions are switched off. At  
C3 the CPU <-> FSB interface no longer processes the bus-snooping  
protocol. That protocol keeps the CPU cache (L1, L2,...) in sync with the  
RAM. It is needed because stuff like WLAN and AGP can write directly into  
the RAM, w/o asking the CPU first.

Example:
Datablock A is in RAM
CPU reads Datablock A (puts it into L2 cache)
CPU goes idle, enters C1, C2, C3 and finaly C4
WLAN rewrites Datablock A with new data in RAM
CPU wakes up
CPU rereads Datablock A => from cache <= reads old, no longer valid data.

There are workarounds (the WLAN puts the CPU in < C2, then writes into  
RAM. Or dump the cache if a unsafe write to the RAM happend). But normaly  
the CPU-drivers do not enter any low states if they are not 100% sure all  
hardware is using the workarounds.

If you are on a powerbased system stuff may be even more complex. I just  
donīt know which C-states Power-CPUs use.

cu